Wednesday, July 4, 2012

1207.0515 (Ted Thorbeck et al.)

Simulating Capacitances to Silicon Quantum Dots: Breakdown of the
Parallel Plate Capacitor Model
   [PDF]

Ted Thorbeck, Akira Fujiwara, Neil M. Zimmerman
Many electrical applications of quantum dots rely on capacitively coupled gates; therefore, to make reliable devices we need those gate capacitances to be predictable and reproducible. We demonstrate in silicon nanowire quantum dots that gate capacitances are reproducible to within 10% for nominally identical devices. We demonstrate the experimentally that gate capacitances scale with device dimensions. We also demonstrate that a capacitance simulator can be used to predict measured gate capacitances to within 20%. A simple parallel plate capacitor model can be used to predict how the capacitances change with device dimensions; however, the parallel plate capacitor model fails for the smallest devices because the capacitances are dominated by fringing fields. We show how the capacitances due to fringing fields can be quickly estimated.
View original: http://arxiv.org/abs/1207.0515

No comments:

Post a Comment